THE FOLD / BOSS / SUDDEN DEATH / THE CONDITIONAL SUM
THE CONDITIONAL SUM
compute both answers, throw one away
1 WHAT IT IS · WHAT IT DOES · FACT OR FICTION
Do not wait for the carry. Compute the high half twice — once assuming a carry arrives, once assuming it does not — and select when the truth turns up.
LIT verified live. carry-select agrees with a plain adder on all 65,536 byte pairs; splitting an 8-bit add at 4 drops latency from 8 to 5 while raising the adder count from 1 to 3; and across every split from 2 to 6 the latency is the max of the two halves plus one, so the slower half sets the clock and the best equal split is at 4.
LIT verified live. carry-select agrees with a plain adder on all 65,536 byte pairs; splitting an 8-bit add at 4 drops latency from 8 to 5 while raising the adder count from 1 to 3; and across every split from 2 to 6 the latency is the max of the two halves plus one, so the slower half sets the clock and the best equal split is at 4.
2 HOW IT WAS WEAVED · AI + HUMAN
Carry-select and conditional-sum adders are the standard way to spend area on latency, and they appear in essentially every commercial ALU.
AVAN (AI) measured the split rather than assuming the middle is best, because the optimum is not obvious: latency is governed by the maximum of the two halves, so an unequal split only pays when the halves start at different times — which is exactly what happens in a multi-stage carry-select chain.
AVAN (AI) measured the split rather than assuming the middle is best, because the optimum is not obvious: latency is governed by the maximum of the two halves, so an unequal split only pays when the halves start at different times — which is exactly what happens in a multi-stage carry-select chain.
3 ONE DIMENSION
Every split point, and the latency it buys.
4 TWO DIMENSIONS · INTERACTIVE
Choose a split and watch the unused half get discarded.
5 THREE DIMENSIONS + AVAN’S INVERSE
The green forward object.
AVAN’s addition (the inverse-companion): the forward reading is that speculating both ways removes the wait. The inverse is that half the hardware computes a result that is thrown away, every single cycle. That work is not wasted occasionally when a prediction misses — it is wasted always, by construction, and it burns power on every addition the machine performs. Read backwards, this is the cleanest example of a trade the field makes constantly: energy spent unconditionally to remove a delay that only sometimes mattered.
LIT carry-select agrees with a plain adder on all 65,536 byte pairs; splitting an 8-bit add at 4 drops latency from 8 to 5 while raising the adder count from 1 to 3; and across every split from 2 to 6 the latency is the max of the two halves plus one, so the slower half sets the clock and the best equal split is at 4
FIG Carry-select and conditional-sum adders are the standard way to spend area on latency, and they appear in essentially every commercial ALU. AVAN measured the split rather than assuming the middle is best, because the optimum is not obvious: latency is governed by the MAXIMUM of the two halves, so an unequal split only pays when the halves start at different times - which is exactly what happens in a multi-stage carry-select chain.
FIG Carry-select and conditional-sum adders are the standard way to spend area on latency, and they appear in essentially every commercial ALU. AVAN measured the split rather than assuming the middle is best, because the optimum is not obvious: latency is governed by the MAXIMUM of the two halves, so an unequal split only pays when the halves start at different times - which is exactly what happens in a multi-stage carry-select chain.
◆ sealed .dlw.fold → folded to ROOT_0 · a sphere of SUDDEN DEATH · David Lee Wise (ROOT0), with AVAN